Semiconductor process development · Electrochemistry · Materials
Saptarshi Paul, PhD is a semiconductor process development specialist working at the intersection of Cu electrodeposition, deposition science, materials characterization, and autonomous experimentation.
01Profile
Working across process development, characterization, and technical integration, Saptarshi translates electrochemical fundamentals into reproducible semiconductor-relevant workflows.
My current work spans Cu electroplating on Si wafers, Cu–Cu hybrid bonding, failure analysis, and the integration of chemistry with robotics, hardware, and software in an autonomous laboratory.
02Current research
UChicago × Argonne
Managing an 8+ member UChicago–Argonne National Laboratory team building an autonomous lab for microelectronics, aimed at high-throughput experimentation for favorable Cu electroplating in trenches, through-silicon vias, and advanced interconnect architectures.
03Experience
Electrochemistry → materials → semiconductor process integration → autonomous experimentation.
Postdoctoral Researcher
Developing and optimizing Cu electroplating processes on Si wafers for Cu–Cu hybrid-bonding semiconductor packaging, with film characterization, root-cause analysis, and process integration.
PhD, Electroanalytical Chemistry
Innovating electrodeposition processes for energy applications, including Cu and multi-component alloy deposition, bath chemistry, transport phenomena, and advanced characterization.
M.S. Chemistry
Characterized light- and heat-driven conformational switching in azobenzene systems using scanning tunneling microscopy and atomic force microscopy.
B.S. Chemistry
Implemented a Fortran/Python Artificial Bee Colony algorithm for Lennard-Jones cluster global optimization.
04Technical skills
Tools and methods spanning fabrication, metrology, electrochemistry, modeling, and experimental automation.
Patterning, etch, and thin-film processes that prepare surfaces for Cu interconnect metallization.
Multi-scale structural, chemical, morphological, optical, and electrical qualification of materials and deposits.
Computational tools for global optimization, process modeling, analysis, and experimental automation.
05Selected publications
Small
EES Batteries
Joule
Angewandte Chemie International
Selected publications shown here; the CV notes a total of 14 peer-reviewed publications. Add a verified Google Scholar URL before launch.
06Education & IP
Purdue University · West Lafayette, IN
Indian Institute of Technology (IIT) Kanpur · India
St. Xavier’s College · Kolkata, India
07 / Contact
For research collaboration, semiconductor process development, technical discussion, or speaking opportunities.
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